2.5 Law Relating to Semi-conductor, Layout and Designs

The chip's craft (LAW 509's U2.1.7 twin): the layout-design (the three-dimensional configuration (the circuitry's topology)); the treaty's stack (the Washington Treaty 1989 + the TRIPS Articles 35-38 (the incorporation + the additions: the innocent-infringer's protection (the notice's craft), the reverse-engineering's allowance, the compulsory-licensing faces)); the protection's nature (the registration-or-the first-commercial-exploitation craft (the short terms (the 10-year world (the functional description)))); the Nepali frame (the PDT Act's design faces'-and-the policy debates (the sui generis absence (the honest note))).